This invention relates to an image pickup method using a CCD (charge-coupled device) type solid state image pickup device as an image input device such as a television camera.
FIG. 1 is a plan view roughly showing a conventional CCD-type solid state image pickup device. In FIG. 1, an input 1 supplies vertical transfer clock signals, a horizontal transfer clock is supplied at an input 2, and an image signal obtained by the image pickup operation is produced at an output 3. An array of photosensitive elements 4 corresponding to image pixels supplies signals to corresponding vertical shift registers 5, which in turn supply signals to a horizontal shift register 6 in response to read-out pulses on a line 7.
In the operation of a raster scanning system of the type shown in FIG. 1 in which the image signals are read from respective photosensitive elements 4 using read-out pulses 7 and transferred into the vertical shift register 5, and then transferred from the vertical shift register to the horizontal shift register 6 using vertical transfer clock pulses 1 and the data is read as an image signal output 3 from the horizontal shift register 6 using horizontal transfer clock pulses from the input 2, reading of an image requires a relatively long interval, such as 1/30th second. This requires a long image-exposure time, thereby hindering high-speed image pickup if an interlace system employing the NTSC system is used.
If the image signal received by the vertical shift register 5 is transferred to the horizontal shift register 6 using an especially high-speed vertical transfer clock by modifying the raster scanning system to a nonraster scanning system, and if the image signal is read out of the horizontal shift register 6 in a short time using a higher-speed horizontal transfer clock and discarded (the scanning for such discard is hereinafter referred to as the nonraster scan), and if the image signals which are formed by the photodetection of the respective photosensors in that short time are then reread and taken as an output, the image exposure time can be shortened and high-speed image pickup can be performed so that an unblurred image signal can be obtained even if the object is moving.
FIG. 2a is a schematic cross-sectional view of a portion M of a CCD structure in which the corresponding portions of one photosensitive element 4 and a vertical shift register 5 of FIG. 1 are included. In other words, FIG. 2a shows an MOS-type CCD pixel structure having an overflow drain structure for eliminating excessive signal charges which may be the cause of blooming and/or smear.
FIG. 2b illustrates schematically the distribution of energy levels at a time t.sub.1 in the structure of FIG. 2a. FIG. 2c illustrates the distribution of energy levels at another time t.sub.2 in the same structure.
In FIG. 2a, the reference numeral 11 denotes a one-pixel image area. FIGS. 2a and 2b show channel stops 12, a V-CCD 13 corresponding to a vertical shift register 5 in FIG. 1, a read-out gate 14, a photosensitive area 15, an overflow control gate 16, and an overflow drain 17. In FIG. 2a, the structure includes an Al photoshield 18, a transparent electrode 19, an insulating film 20, and an electrode 21. FIGS. 2b and 2c illustrate signal charges 22 and overflow charges 23.
In the symbol representation of P.sup.+, N.sup.+ and P.sup.-, + and - indicate that the impurity densities are higher or lower, respectively. Reference character P denotes a P-type semiconductor and N denotes an N-type semiconductor, as usual.
FIG. 3 is a timing chart for the vertical transfer clock signals at the input 1 of FIG. 1 and the read-out pulses 7 applied to the device shown in FIG. 2a.
The operation of the system will now be described with reference to FIGS. 2a, 2b, 2c and 3.
In FIG. 2a, a bias potential V.sub.SG is applied to the transparent electrode 19. Vertical transfer clock pulses 1 and read-out pulses 7, shown in FIG. 3, are applied to the electrode 21. Synthesis of a clock signal 1 and a read-out pulse 7 will result in a three-value (V.sub.H, V.sub.M and V.sub.L) signal as shown in FIG. 3.
A distribution of electron energy levels during storage of signal charges in the device of FIG. 2a, for example, at a time t.sub.1 (FIG. 3) is shown in FIG. 2b. At the time t.sub.1, namely, when no read-out pulse 7 is applied, the transparent electrode 19 is impressed with a bias voltage V.sub.SG, and the energy level is lowered by a potential difference V.sub.SG, corresponding to the bias voltage V.sub.SG between the photosensitive section 15 and overflow drain 17. As a result, a well for storage of electric charges is formed.
If a vertical transfer clock pulse 1 is applied to the electrode 21, the energy levels will be lowered by potential differences V.sub.M ' and V.sub.L ' corresponding to the potential levels V.sub.M and V.sub.L of the transfer clock pulse 1 between the overflow drain 17 and the read-out gate 14, and thus a well for storage of electric charges will be formed.
As is clear from FIG. 3, the following relationship holds: EQU V.sub.M '&gt;V.sub.L '
In FIG. 2b, the relationship P.sub.A &gt;P.sub.B holds where P.sub.B is the magnitude of a potential barrier produced at the junction between the photosensitive section 15 and the overflow control gate 16 of the device and V.sub.SG '-V.sub.M '=P.sub.A.
If light enters the solid state image pickup device, electrons are optically excited where the layer 20 is not covered with the Al photoshield 18, and they are stored as electric charges in the electron well in the photosensitive section 15.
The quantity of electric charge stored in the well is limited by the potential barrier P.sub.B, and any electric charges 23 overflowing the barrier P.sub.B flow out via the overflow control gate 16 to the overflow drain 17 and are then discharged from the image pickup device.
The potential barrier P.sub.B is usually selected so that the total charge on the photosensitive section 15 does not exceed the charge which can be handled by the V-CCD 13. The magnitude of the barrier is determined by the difference in the impurity densities of the semiconductors constituting the photosensitive section 15 and the overflow control gate 16.
Application of a read-out pulse at a time t.sub.2 as shown in FIG. 3 will be described with reference to FIG. 2c. If a read-out pulse 7 is applied to the electrode 21 of FIG. 1, the energy level will be lowered by a level difference V.sub.H ' corresponding to the potential V.sub.H of the read-out pulse 7 between the overflow drain 17 and the read-out gate 14. If V.sub.H '-V.sub.M '=P.sub.C, the energy level will be further lowered by a level corresponding to a potential barrier P.sub.C compared to the level shown in FIG. 2b.
At this time, the following condition should hold: EQU V.sub.H '.gtoreq.V.sub.SG '
Thus, the energy level of read-out gate 14 is lowered compared to the photosensitive section 15 and the signal charges 22 flow via the read-out gate 14 into the V-CCD 13 and are read.
It is to be noted that a channel stop 12 is provided between the V-CCD 13 and the adjacent pixel overflow drain 17 such that no electric charges 22 on the V-CCD 13 leak out.
At a time t.sub.3 when a vertical transfer clock pulse 1 is applied, the energy level difference between the read-out gate 14 and the photosensitive section 15 will be further increased because: EQU P.sub.A '&gt;P.sub.A if V.sub.SG '-V.sub.L '=P.sub.A '
At present, the electric charge transfer system for one known CCD includes a four-phase clock system. Herein, as an example, the structure of a CCD which employs a three-phase clock system is shown in FIG. 4a, while fluctuations in the electron energy level of the CCD at the respective timings by three-phase transfer clock pulses 25a, 25b and 25c, such as are shown in FIG. 5, are illustrated in FIG. 4b.
FIG. 4a shows a V-CCD 13 corresponding to the vertical shift register 5 of FIG. 1 having electrodes 21. The V-CCD 13 of FIG. 4a receives the inflow signal charges shown in FIG. 2c.
In FIGS. 4a, 4b and 5, when the time shifts from Ta to Tc, the clock pulse 25b changes from low L to high H while the clock pulse 25a changes from high H to low L. This shifts the charge well by a distance corresponding to one electrode 21 to the right as viewed in FIG. 4a, moving the signal charges 22 in the well by a distance corresponding to one electrode 21. Such shifting of electric charges 22 is repeated as shown in FIG. 4b until the time Tg to thereby transfer signal charges 22 for one pixel.
In the foregoing, description has been made with respect to FIG. 1 as follows: if the image signal taken into vertical shift register 5 is transferred to horizontal shift register 6 in a nonraster scanning system by modifying a raster scanning system using an especially high-speed vertical transfer clock, and if the image signal is read out of the horizontal shift register 6 in a short time using a much higher-speed horizontal transfer clock and discarded, and if the image signal formed by the photodetection of the respective photosensors in that short time is then reread out and taken as an output, then a short exposure time will be obtained to permit high-speed image pickup.
If the quantity of electric charges read out of the horizontal shift register 6 and discarded as useless is large and greater than the discharge capacity of the horizontal shift register 6, the charges may remain in the horizontal shift register 6 for a time without being discharged. As a result, the remaining charges are added to the next electric charges received as an image signal is read out next, such as the electric charges constituting the edge portion of the image, to thereby distort part of the received image and deteriorate the image quality.